#include	<system.h>

// PIN definitions
#define FIFO_l         	portb.1   // FIFO pin
#define FIFOP_l        	portb.0   // FIFOP pin 
#define CCA_l          	portb.6   // Clear Channel Assessment pin
#define CSN_l			latd.2	  // Chip select

#define FIFO_r         	portb.4   // Right FIFO pin
#define FIFOP_r        	portb.2   // FIFOP pin 
#define CCA_r          	portb.7   // Clear Channel Assessment pin
#define CSN_r			latd.3	  // Chip select

// Timer interrupts
#define CSMATMR			intcon.5 // CSMA algorithm timer

// Command Strobes
#define SNOP	 	  	0x00 // No Operation (has no other effect than reading out status-bits)
#define SXOSCON	 	  	0x01 // Turn on the crystal oscillator (set XOSC16M_PD = 0 and BIAS_PD = 0)
#define STXCAL	 	  	0x02 // Enable and calibrate frequency synthesizer for TX;Go from RX/TX to a wait state where only the synthesizer is running.
#define SRXON		  	0x03 // Enable RX
#define STXON		  	0x04 // Enable TX after calibration (if not already performed). Start TX in-line encryption if SPI_SEC_MODE != 0
#define STXONCCA      	0x05 // If CCA indicates a clear channel:Enable calibration, then TX.Start in-line encryption if SPI_SEC_MODE != 0 else do nothing
#define SRFOFF		  	0x06 // Disable RX/TX and frequency synthesizer
#define SXOSCOFF	 	0x07 // Turn off the crystal oscillator and RF
#define SFLUSHRX	  	0x08 // Flush the RX FIFO buffer and reset the demodulator. Always read at least one byte from the RXFIFO before issuing the SFLUSHRX command strobe
#define SFLUSHTX	  	0x09 // Flush the TX FIFO buffer
#define SACK		  	0x0A // Send acknowledge frame, with pending field cleared.
#define SACKPEND	  	0x0B // Send acknowledge frame, with pending field set.
#define SRXDEC		  	0x0C //  S Start RXFIFO in-line decryption / authentication (as set by SPI_SEC_MODE)
#define STXENC		  	0x0D // Start TXFIFO in-line encryption / authentication (as set by SPI_SEC_MODE), without starting TX.
#define SAES			0x0E // AES Stand alone encryption strobe. SPI_SEC_MODE is not required to be 0, but the encryption module must be idle. If not, the strobe is ignored.

// Register Adresses
#define MAIN_REG			0x10 // Main Control Register
#define MDMCTRL0_REG		0x11 // Modem Control Register 0
#define MDMCTRL1_REG		0x12 // Modem Control Register 1
#define RSSI_REG			0x13 // RSSI and CCA Status and Control register
#define SYNCWORD_REG		0x14 // Synchronisation word control register
#define TXCTRL_REG			0x15 // Transmit Control Register
#define RXCTRL0_REG			0x16 // Receive Control Register 0
#define RXCTRL1_REG			0x17 // Receive Control Register 1
#define FSCTRL_REG			0x18 // Frequency Synthesizer Control and Status Register
#define SECCTRL0_REG		0x19 // Security Control Register 0
#define SECCTRL1_REG		0x1A // Security Control Register 1
#define BATTMON_REG			0x1B // Battery Monitor Control and Status Register
#define IOCFG0_REG			0x1C // Input / Output Control Register 0
#define IOCFG1_REG			0x1D // Input / Output Control Register 1
#define MANFIDL_REG			0x1E // Manufacturer ID, Low 16 bits
#define MANFIDH_REG			0x1F // Manufacturer ID, High 16 bits
#define FSMTC_REG			0x20 // Finite State Machine Time Constants
#define MANAND_REG			0x21 // Manual signal AND override register
#define MANOR_REG			0x22 // Manual signal OR override register
#define AGCCTRL_REG			0x23 // AGC Control Register
#define AGCTST0_REG			0x24 // AGC Test Register 0
#define AGCTST1_REG			0x25 // AGC Test Register 1
#define AGCTST2_REG			0x26 // AGC Test Register 2
#define FSTST0_REG			0x27 // Frequency Synthesizer Test Register 0
#define FSTST1_REG			0x28 // Frequency Synthesizer Test Register 1
#define FSTST2_REG			0x29 // Frequency Synthesizer Test Register 2
#define FSTST3_REG			0x2A // Frequency Synthesizer Test Register 3
#define RXBPFTST_REG		0x2B // Receiver Bandpass Filter Test Register
#define FSMSTATE_REG		0x2C // Finite State Machine State Status Register
#define ADCTST_REG			0x2D // ADC Test Register
#define DACTST_REG			0x2E // DAC Test Register
#define TOPTST_REG			0x2F // Top Level Test Register
#define RESERVED_REG		0x30 // Reserved for future use control / status register
#define TXFIFO_REG			0x3E // Transmit FIFO Byte Register
#define RXFIFO_REG			0x3F // Receiver FIFO Byte Register

// IEEE 802.15.4 Definitions
#define BEinit			3
#define NBinit			0
#define BEMax			5
#define NBMax			4

// Algorithm definitions
#define REPEL_THRESH   	55
#define COUNTER_THRESH 	 5

// Algorithm variables
//bit l_receive; //defined in the header instead of the individual C files...
//bit r_receive; //do the values from cc2420lib need to be passed any special way to the values in hovercraft.c?

void interrupt(void);
void SPI_init(void);
void CC2420_init(void);
void intrpt_init(void);
char SSPsend(char address);

unsigned short read_reg_l(unsigned short address);
unsigned short read_reg_r(unsigned short address);

void write_reg_l(unsigned short address, unsigned short data);
void write_reg_r(unsigned short address, unsigned short data);

char* read_rxfifo_l(void);
char* read_rxfifo_r(void);

void write_txfifo_l(char* payload);
void write_txfifo_r(char* payload);

char* read_txfifo_l(void);
char* read_txfifo_r(void);

char* receive_pkt_l(void);
char* receive_pkt_r(void);

void send_packet_l(char* packet);
void send_packet_r(char* packet);

void CSMA_CA_l(void);
void CSMA_CA_r(void);

void timer_320us(int delay);
